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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
September 2008
FSFA2100 -- Fairchild Power Switch (FPSTM)
for Half-Bridge PWM Converters
Features
Optimized for Complementary Driven Half-Bridge Soft-Switching Converters Can be Applied to Various Topologies: Asymmetric PWM Half-Bridge Converters, Asymmetric PWM Flyback Converters, Asymmetric PWM Forward Converters, Active Clamp Flyback Converters High Efficiency through Zero-Voltage-Switching (ZVS) Internal SuperFETTMs with Fast-Recovery Type Body Diode (trr=120ns) Fixed Dead Time (200ns) Optimized for MOSFETs Up to 300kHz Operating Frequency Internal Soft-Start Pulse-by-Pulse Current Limit Burst-Mode Operation for Low Standby Power Consumption Protection Functions: Over-Voltage Protection (OVP), Over-Load Protection (OLP), Abnormal Over-Current Protection (AOCP), Internal Thermal Shutdown (TSD)
Description
The growing demand for higher power density and low profile in power converter designs has forced designers to increase switching frequencies. Operation at higher frequencies considerably reduces the size of passive components, such as transformers and filters. However, switching losses have been an obstacle to highfrequency operation. To reduce switching losses and allow high-frequency operation, Pulse Width Modulation (PWM) with soft-switching techniques have been developed. These techniques allow switching devices to be softly commutated, which dramatically reduces the switching losses and noise. FSFA2100 is an integrated PWM controller and SuperFETTM specifically designed for Zero-VoltageSwitching (ZVS) half-bridge converters with minimal external components. The internal controller includes an oscillator, under-voltage-lockout, leading-edge blanking (LEB), optimized high-side and low-side gate driver, internal soft-start, temperature-compensated precise current sources for loop compensation and selfprotection circuitry. Compared with discrete MOSFET and PWM controller solution, FSFA2100 can reduce total cost; component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability.
Applications
PDP and LCD TVs Desktop PCs and Servers Adapters Telecom Power Supplies
Ordering Information
Part Number
FSFA2100
Operating Junction RDS(ON_MAX) Temperature
-40 to +130C 0.38
Maximum Output Power without Heatsink (1,2) (VIN=350~400V)
200W
Maximum Output Eco Power with Heatsink Package (1,2) Status (VIN=350~400V)
450W 9-SIP RoHS
Notes: 1. The junction temperature can limit the maximum output power. 2. Maximum practical continuous power in an open-frame design at 50C ambient.
For Fairchild's definition of "green" Eco Status, please visit: http://www.fairchildsemi.com/company/green/rohs_green.html.
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Application Circuit Diagram
D1 CB Llk VCC RT LVcc VDL HVcc Lm Ns
Np
Ns
VO
CDL VIN
VFB
Control IC VCTR
D2 CF RF KA431
CS SG PG
Rsense
Figure 1. Typical Application Circuit for an Asymmetric PWM Half-Bridge Converter
CB D1 Llk VCC RT LVcc VDL HVcc Lm Ns VO Np
CDL VIN
VFB
Control IC VCTR
CS SG PG KA431
CF RF
Rsense
Figure 2. Typical Application Circuit for an Asymmetric PWM Flyback Converter
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Block Diagram
Figure 3. Internal Block Diagram
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Pin Configuration
1 VDL
2 VFB
34 5 6 7 8 RT SG LVcc CS PG
9 HVcc
10 VCTR
Figure 4. Package Diagram
Pin Definitions
Pin #
1 2 3 4 5 6 7 8 9 10
Name
VDL VFB RT CS SG PG LVCC NC HVCC VCTR
Description
This is the drain of the high-side MOSFET, typically connected to the input DC link voltage. This pin is connected to the inverting input of the PWM comparator internally and to the opto-coupler externally. The duty cycle is determined by the voltage on this pin. This pin programs the switching frequency using a resistor. This pin senses the current flowing through the low-side MOSFET. Typically, negative voltage is applied on this pin. This pin is the control ground. This pin is the power ground. This pin is connected to the source of the low-side MOSFET. This pin is the supply voltage of the control IC. No connection. This is the supply voltage of the high-side gate-drive circuit IC. This is the drain of the low-side MOSFET. Typically, a transformer is connected to this pin.
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. TA=25C unless otherwise specified.
Symbol
VDS LVCC HVCC VFB VCS VRT dVCTR/dt PD TJ TSTG VDGR VGS IDM ID
Parameter
Maximum Drain-to-Source Voltage (VDL-VCTR and VCTR-PG) Low-Side Supply Voltage High-Side Floating Supply Voltage Feedback Pin Input Voltage Current Sense (CS) Pin Input Voltage RT Pin Input Voltage Allowable Low-Side MOSFET Drain Voltage Slew Rate Total Power Dissipation
(3) (4) (4)
Min.
600 -0.3 -0.3 -0.3 -0.3 -5.0 -0.3
Max.
25.0 25.0 625.0 LVCC 1.0 5.0 50 12.0 +150
Unit
V V V V V V V V/ns W C C V
HVCC to VCTR High-Side VCC Pin to Low-Side Drain Voltage
Maximum Junction Temperature Storage Temperature Range Drain Gate Voltage (RGS=1M) Gate Source (GND) Voltage Drain Current Pulsed Continuous Drain Current
Recommended Operating Junction Temperature
-40 -55 600
+130 +150
MOSFET Section 30 33 TC=25C TC=100C 5~7 11 7 V A A
Package Section Torque Recommended Screw Torque kgf*cm Notes: 3. Per MOSFET when both MOSFETs are conducting. 4. The maximum value of the recommended operating junction temperature is limited by thermal shutdown.
Thermal Impedance
TA=25C unless otherwise specified.
Symbol
JC
Parameter
Junction-to-Case Center Thermal Impedance (Both MOSFETs Conducting)
Value
10.44
Unit
C/W
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Electrical Characteristics
TA=25C and LVCC=17V unless otherwise specified.
Symbol
MOSFET Section BVDSS RDS(ON) trr
Parameter
Test Conditions
ID=200A, TA=25C ID=200A, TA=125C VGS=10V, ID=5.5A
(5)
Min.
600
Typ.
Max.
Unit
Drain-to-Source Breakdown Voltage On-State Resistance Body Diode Reverse Recovery Time
650 0.32 120 0.38
V ns
VGS=0V, IDiode=11.0A, dIDiode/dt=100A/s
Supply Section ILK IQHVCC IQLVCC Offset Supply Leakage Current Quiescent HVCC Supply Current Quiescent LVCC Supply Current Operating HVCC Supply Current (RMS Value) Operating LVCC Supply Current (RMS Value) HVCC=VCTR=600V (HVCCUV+) - 0.1V (LVCCUV+) - 0.1V fOSC=100KHz, VFB > 3V HVCC=17V No switching, VFB < 1V HVCC=17V fOSC=100KHz, VFB > 3V No switching, VFB < 1V 50 100 6 100 7 2 50 120 200 9 200 11 4 A A A mA A mA mA
IOHVCC
IOLVCC
UVLO Section LVCCUV+ LVCCUVLVCCUVH HVCCUV+ HVCCUVHVCCUVH LVCC Supply Under-Voltage Positive Going Threshold (LVCC Start) LVCC Supply Under-Voltage Negative Going Threshold (LVCC Stop) LVCC Supply Under-Voltage Hysteresis HVCC Supply Under-Voltage Positive Going Threshold (HVCC Start) HVCC Supply Under-Voltage Negative Going Threshold (HVCC Stop) HVCC Supply Under-Voltage Hysteresis 8.2 7.8 13.0 10.2 14.5 11.3 3.2 9.2 8.7 0.5 10.2 9.6 16.0 12.4 V V V V V V
Oscillator and Feedback Section VRT fOSC DMAX DMIN
MAX VFB
V-I Converter Threshold Voltage Output Oscillation Frequency Maximum Duty Cycle Minimum Duty Cycle Maximum Feedback Voltage for DMAX Feedback Source Current Burst Mode High-Threshold Voltage Burst Mode Low-Threshold Voltage Burst Mode Hysteresis Voltage Internal Soft-Start Time fOSC=100kHz RT=27K VFB=4V VFB=0V DMAX 48% VFB=0V
1.5 94 45
2.0 100 50
2.5 106 55 0
V KHz % % V A V V V ms
2.7 370 1.34 1.16 0.1 10
3.0 470 1.50 1.30 0.2 15
3.3 570 1.66 1.44 0.3 20
IFB VBH VBL VBHY tSS
Continued on the following page...
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Electrical Characteristics (Continued)
TA=25C and LVCC=17V unless otherwise specified.
Symbol
Protection Section IOLP VOLP VOVP VAOCP tBAO tDA VLIM tBL tDL TSD ISU VPRSET OLP Delay Current
Parameter
Test Conditions
VFB=5V VFB > 6V LVCC > 21V V/t=-1V/s VCS < VAOCP; V/t=-1V/s
(5)
Min.
3.8 6.3 21 -1.0
Typ.
5.0 7.0 23 -0.9 50 250
Max.
6.2 7.7 25 -0.8
Unit
A V V V ns
OLP Protection Voltage LVCC Over-Voltage Protection AOCP Threshold Voltage AOCP Blanking Time
(5)
Delay Time (Low-Side) from VAOCP to Switch Off Pulse-by-Pulse Current Limit Threshold Voltage Pulse-by-Pulse Current Limit Blanking Time Delay Time (Low-Side) from VLIM to Switch Off Thermal Shutdown Temperature
(5)
V/t=-1V/s V/t=-0.1V/s VCS < VLIM; V/t=-0.1V/s -0.64
400 -0.52
ns V ns ns
-0.58 150 450
(5)
V/t=-0.1V/s 110 LVCC=7.5V 5
130 100
150 150
C A V
Protection Latch Sustain LVCC Supply Current Protection Latch Reset LVCC Supply Voltage
(6)
Dead-Time Control Section DT Dead Time 200 ns
Notes: 5. This parameter, although guaranteed, is not tested in production. 6. These parameters, although guaranteed, are tested only in EDS (wafer test) process.
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Typical Performance Characteristics
These characteristic graphs are normalized at TA=25C.
1.1
1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 5. Maximum Duty Cycle vs. Temperature
Figure 6. Switching Frequency vs. Temperature
1.1
1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 7. High-Side VCC (HVCC) Start vs. Temperature
Figure 8. High-Side VCC (HVCC) Stop vs. Temperature
1.1
1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 9. Low-Side VCC (LVCC) Start vs. Temperature
Figure 10. Low-Side VCC (LVCC) Stop vs. Temperature
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Typical Performance Characteristics (Continued)
These characteristic graphs are normalized at TA=25C.
1.1 1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 11. OLP Delay Current vs. Temperature
Figure 12. OLP Voltage vs. Temperature
1.1
1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 13. LVCC OVP Voltage vs. Temperature
Figure 14. RT Voltage vs. Temperature
1.1
1.1
Normalized at 25
Normalized at 25
1.05
1.05
1
1
0.95
0.95
0.9 -40 -20 0 25 50 75 100
0.9 -40 -20 0 25 50 75 100
Temp ()
Temp ()
Figure 15. VBH Voltage vs. Temperature
Figure 16. VLIM Voltage vs. Temperature
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Functional Description
1. Internal Oscillator: FSFA2100 employs a currentcontrolled oscillator as shown in Figure 17. Internally, the voltage of the RT pin is regulated at 2V and the charging/discharging current for the oscillator capacitor CT is determined by the current flowing out of the RT pin (ICTC). When the RT pin is pulled down to the ground with a resistor RSET, the switching frequency is fixed as:
27k x 100(kHz) RSET
fS =
(1)
Figure 19. Internal PWM Block Diagram
Figure 17. Current Controlled Oscillator
2. PWM Control: Figure 18 shows the typical control circuit configuration. The opto-coupler transistor should be connected to the VFB pin in parallel with the feedback capacitor to control the duty cycle.
3. Protection Circuits: The FSFA2100 has Overload Protection (OLP), Abnormal Over-Current Protection (AOCP), Over-Voltage Protection (OVP), and Thermal Shutdown (TSD) self-protective functions. The OLP and OVP are auto-restart mode protections, while the AOCP and TSD are latch-mode protections, as shown in Figure 20. Auto-restart mode protection: Once the fault condition is detected, the switching is terminated and the MOSFETs remain off. When LVCC falls down to LVCC stop voltage of around 11V, the protection is reset. The FPS resumes normal operation when LVCC reaches the start voltage of about 14V. Latch-mode protection: Once this protection is triggered, the switching is terminated and the MOSFETs remain off. The latch is reset only when LVCC is discharged below 5V.
Figure 18. PWM Control Configuration
Figure 19 shows the internal block diagram for PWM operation. Duty cycle is controlled by comparing the feedback voltage to the triangular signal with a range from 1V to 3V.
Figure 20. Protection blocks Low-side MOSFET current should be sensed for Pulseby-pulse current limit and AOCP. The FSFA2100 senses drain current as a negative voltage, as shown in Figure 21 and Figure 22. Half-wave sensing allows low-power dissipation in the sensing resistor, while full-wave sensing has less noise in the sensing signal.
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
through the MOSFET is limited; and, therefore, the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (VO) decreases below the nominal voltage. This reduces the current through the opto-coupler diode, which also reduces the opto-coupler transistor current, increasing the feedback voltage (VFB). If VFB exceeds 3V, D1, which is illustrated in Figure 19, is blocked and the OLP current source starts to charge CB slowly, as shown in Figure 23. In this condition, VFB continues increasing until it reaches 7V, then the switching operation is terminated, as shown in Figure 23. The delay time for shutdown is the time required to charge CB from 3V to 7V with 5A, as given by:
(7V - 3V ) x C B 5 A
Figure 21. Half-Wave Sensing
t delay =
(2)
A 30 ~ 50ms delay time is typical for most applications.
VO
7V
Overload protection VFB
3V
Vc
tdelay
Figure 22. Full-Wave Sensing
Ids
t1
t2 ILIM
t
3.1 Pulse-by-Pulse Current Limit: In normal operation, the duty cycle of the low-side MOSFET is determined by comparing the internal triangular signal with the feedback voltage. However, the low-side MOSFET is forced to turn off when the current sense pin voltage reaches -0.58V. This operation limits the drain current below a pre-determined level to avoid the destruction of the MOSFETs. 3.2 Abnormal Over-Current Protection (AOCP): If one of the secondary rectifier diodes is short-circuited, large current with extremely high di/dt can flow through the MOSFET before OCP or OLP is triggered. AOCP is triggered with a very short shutdown delay time when the sensed voltage drops below -0.9V. This protection is latch mode and reset only when LVCC is pulled below 5V. 3.3 Overload Protection (OLP): Overload is defined as the load current exceeding its nominal level due to an unexpected abnormal event. In this situation, a protection circuit should trigger to protect the power supply. However, even when the power supply is in the normal condition, the OLP circuit can be triggered during the load transition. To avoid this undesired operation, the OLP circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Because of the pulse-by-pulse current limit capability, the maximum peak current
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0 11
Figure 23. Overload Protection
3.4 Over-Voltage Protection (OVP): When the LVCC reaches 23V, OVP is triggered. This protection is enabled when using an auxiliary winding of the transformer to supply LVCC to FPS. 3.5 Thermal Shutdown (TSD): The MOSFETs and the control IC are built in one package. This allows the control IC to detect the abnormal over-temperature of the MOSFET. If the temperature exceeds approximately 130C, the thermal shutdown triggers. 4. Soft-Start: At startup, the duty cycle starts increasing slowly to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish the required output voltage. Soft-start time is internally implemented for 15ms (when the operating frequency is set to 100kHz.) In addition, to help the soft-start operation, a capacitor and a resistor would be connected on the RT pin externally, as shown in Figure 24. Before the power supply is powered on, the capacitor CSS remains fully discharged. After power-on, CSS becomes charged progressively by the current
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
through the RT pin, which determines the operating frequency. The current through the RT pin is inversely proportional to the total impedance of the connected resistors. The total impedance at startup is lower than that of the normal operation because RSS is added on RSET in parallel, which means the operating frequency decreases continuously from higher to nominal. Eventually CSS is fully charged to the RT pin voltage and the operating frequency is determined by RSET only. During the charging time of CSS, the operating frequency is higher than during normal operation. In asymmetric half-bridge converters, a switching period contains powering and commutation periods. The energy cannot be transferred to the output side during commutation period. Since the DC link voltage applied to the VDL pin and the leakage inductance of the main transformer are fixed, the powering period over the switching period is shorter in high switching frequencies. As CSS is charged, the switching frequency decreases and the powering period over the switching period increases as well. It is helpful to start SMPS softly with the internal soft-start time together.
applied voltage make an excessive primary current. When the high-side MOSFET turns off, the primary current flows back to the DC link capacitor through the body diode of the low-side MOSFET. It keeps the same status even after turning on and off the low-side MOSFET. When the high-side MOSFET turns on again, a huge current can flow from the DC link capacitor through the channel of the high-side MOSFET and body diode of the low-side one due to the reverse recovery. It may induce unexpected noise into CS pin. To avoid this issue, the voltage across the DC blocking capacitor must be low enough. In general, two resistors with several MHz can be added on the drain-to-source terminals of each MOSFET to divide the DC link voltage. 6. Burst Operation: To minimize power dissipation in standby mode, the FSFA2100 enters burst-mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 25, the device automatically enters burst mode when the feedback voltage drops below VBL (1.3V). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBH (1.5V), switching resumes. The feedback voltage then falls and the process repeats. Burst-mode operation alternately enables and disables switching of the MOSFETs, thereby reducing switching loss in standby mode.
VO
Voset
VFB
1.5V 1.3V
Figure 24. External Soft-Start Circuit
Ids
5. Startup: Due to the imbalance of the turn-off resistance between the high- and low-side MOSFETs, the voltage across the DC blocking capacitor cannot be predicted at startup. Additionally, the high-side MOSFET starts with a large duty cycle since the duty cycle of the low-side MOSFET increases step-by-step during softstart time. Therefore, in the case where high voltage is already charged in the DC blocking capacitor due to the higher turn-off resistance of the high-side MOSFET before startup, a large primary current could flow through the high-side MOSFET during turn-on time after startup. For the high-side MOSFET, a long duty cycle and high
Vds
t
t1
Switching stop
t2
t3
Switching stop
t4
Figure 25. Burst-Mode Operation
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Typical Application Circuit (Asymmetric PWM Half-Bridge Converter)
Application
LCD TV
FPSTM Device
FSFA2100
Input Voltage Range
400V
Rated Output Power
200W
Output Voltage (Rated Current)
25V-8A
Features
High Efficiency ( >93% at 400VIN input) Reduced EMI Noise through Zero-Voltage-Switching (ZVS) Enhanced System Reliability with Various Protection Functions Internal Soft-Start (15ms)
Figure 26. Typical Application Circuit
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Typical Application Circuit (Continued)
Core: EER3542 (Ae=107 mm ) Bobbin: EER3542 (Horizontal)
2
EER3542 1 Np Ns1 1 3 1 2 Ns2 8 9 16
Figure 27. Core and Winding
Pin(S F)
Np Ns1 Ns2 81 16 13 12 9
Wire
0.12x30 (Litz wire) 0.1x100 (Litz wire) 0.1x100 (Litz wire)
Turns
50 8 8
Winding Method
Solenoid winding Solenoid winding Solenoid winding
Pin
Inductance Leakage 1 8 1 8
Specification
630H 5% 45H 10%
Remark
100kHz, 1V Short one of the secondary windings
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
Physical Dimensions
SIPMODAA09RevA
Figure 28. 9-SIP Package
Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild's worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor's online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/.
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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FSFA2100 -- Fairchild Power Switch (FPSTM) for Half-Bridge PWM Converter
(c) 2008 Fairchild Semiconductor Corporation FSFA2100 * Rev. 1.0.0
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